Reimagining Computing for the 21st Century
Since the inception of computing, we have been reliant on CPU-powered architectures. The CPU was and remains the primary, general-purpose workhorse, where we run our data-processing software. Thanks to various technical advancements (collectively known as Moore’s Law), as the performance of the CPU increased by orders of magnitudes, so did our data processing capabilities. However, today this reliance on the CPU is challenged by manufacturing limitations (CMOS scaling), performance expectations (stalled CPU frequencies, Turing tax), and security concerns (microarchitectural attacks and their mitigation). In this project, we are envisioning a world without CPUs. A CPU-free computing architecture can completely eliminate the CPU (0% usage) and associated inefficiencies from computing. The project will revolutionize the way computation is done by building a first-of-its-kind CPU-free data-processing application that leverages modern domain-specific, programmable non-CPU devices and accelerators available today. As a first step, we are designing and implementing a unified data processing unit (DPU) called Hyperion that integrates three primary pillars of computing, i.e., networking, storage, and computing, into a single CPU-free device. We are leveraging advancements in hardware design, HDL languages, compilers and networking technologies to deploy and program Hyperion DPU.
Animesh Trivedi, 2-pages executive summary, [PDF], September, 2022.
Marco Spaziani Brunella (University of Rome Tor Vergata, Axbryd), Marco Bonola (CNIT/Axbryd), and Animesh Trivedi (Vrije Universiteit Amsterdam), Hyperion: A Case for Unified, Self-Hosting, Zero-CPU Data-Processing Units (DPUs), https://arxiv.org/abs/2205.08882, August, 2022.
Marco Spaziani Brunella (University of Rome Tor Vergata, Axbryd), Marco Bonola (CNIT/Axbryd), and Animesh Trivedi (Vrije Universiteit Amsterdam), Hyperion: A Unified, Zero-CPU Data-Processing Unit (DPU), in the 11th Workshop on Systems for Post-Moore Architectures (SPMA, co-located with EuroSys), [PDF], February, 2022.
This work is generously supported by the NWO grant number OCENW.XS3.030, Project Zero: Imagining a Brave CPU-free World!, and the Xilinx University Donation Program.